Add msm8937_64-user 11 RP1A.200720.012 eng.compil.20220316.164614 release-keys

Signed-off-by: Sushrut1101 <guptasushrut@gmail.com>

.gitignore

+vendor/camera3rd/sensetime
+vendor/camera3rd/sensetime/calibration.lic
+vendor/camera3rd/sensetime/dualcapture.lic
+vendor/lib64/libvivo3rd_sensetime.so

README.md

+## msm8937_64-user 11 RP1A.200720.012 eng.compil.20220316.164614 release-keys
+- Manufacturer: vivo
+- Platform: msm8937
+- Codename: 1906
+- Brand: vivo
+- Flavor: msm8937_64-user
+- Release Version: 11
+- Id: RP1A.200720.012
+- Incremental: eng.compil.20220316.164614
+- Tags: release-keys
+- CPU Abilist: arm64-v8a,armeabi-v7a,armeabi
+- A/B Device: false
+- Locale: en-US
+- Screen Density: 320
+- Fingerprint: vivo/1906/1906:11/RP1A.200720.012/compiler0316164337:user/release-keys
+- OTA version: 
+- Branch: msm8937_64-user-11-RP1A.200720.012-eng.compil.20220316.164614-release-keys
+- Repo: vivo/1906

board-info.txt

+require version-baseband=3.3-00045-SDM439_GENNS_PACK-2.420415.2.423016.1
+require version-trustzone=TZ.BF.4.0.5-414670
+require version-vendor=1647420217

boot/img_info

+kernel=kernel
+ramdisk=ramdisk
+page_size=2048
+dt=dtb.img
+kernel_size=13224742
+ramdisk_size=0
+dtb_offset=0x01f00000
+dtb_size=6750512
+base_addr=0x80000000
+kernel_offset=0x00008000
+ramdisk_offset=0x80000000
+tags_offset=0x00000100
+dtbo_offset=0x80000000
+cmd_line='console=null androidboot.console=null androidboot.hardware=qcom msm_rtb.filter=0x237 ehci-hcd.park=3 lpm_levels.sleep_disabled=1 androidboot.bootdevice=7824900.sdhci earlycon=null androidboot.usbconfigfs=true loop.max_part=7 ignore_loglevel printk.devkmsg=on product.version=PD1930F_EX_A_6.8.55 fingerprint.abbr=11/RP1A.200720.012 buildvariant=user androidboot.securebootkey=alpha androidboot.securebootkeyhash=60ba997fef6da9f05885fa11f1dd6d2a90d052a257a09c2075d7246cc73c0d43 androidboot.securebootkeyver=1'
+board=""

bootdts/04_dtbdump_Qualcomm_Technologies,_Inc._DB820c.dts

+/dts-v1/;
+
+/ {
+	#address-cells = <0x2>;
+	#size-cells = <0x2>;
+	compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
+	interrupt-parent = <0x1>;
+	model = "Qualcomm Technologies, Inc. DB820c";
+
+	__symbols__ {
+		CPU0 = "/cpus/cpu@0";
+		CPU1 = "/cpus/cpu@1";
+		CPU2 = "/cpus/cpu@100";
+		CPU3 = "/cpus/cpu@101";
+		L2_0 = "/cpus/cpu@0/l2-cache";
+		L2_1 = "/cpus/cpu@100/l2-cache";
+		blsp1_i2c2 = "/soc/i2c@07577000";
+		blsp1_i2c2_default = "/soc/pinctrl@1010000/blsp1_i2c2_default";
+		blsp1_i2c2_sleep = "/soc/pinctrl@1010000/blsp1_i2c2_sleep";
+		blsp1_spi0 = "/soc/spi@07575000";
+		blsp1_spi0_default = "/soc/pinctrl@1010000/blsp1_spi0_default";
+		blsp1_spi0_sleep = "/soc/pinctrl@1010000/blsp1_spi0_sleep";
+		blsp2_i2c0 = "/soc/i2c@075b5000";
+		blsp2_i2c0_default = "/soc/pinctrl@1010000/blsp2_i2c0";
+		blsp2_i2c0_sleep = "/soc/pinctrl@1010000/blsp2_i2c0_sleep";
+		blsp2_i2c1 = "/soc/i2c@075b6000";
+		blsp2_i2c1_default = "/soc/pinctrl@1010000/blsp2_i2c1";
+		blsp2_i2c1_sleep = "/soc/pinctrl@1010000/blsp2_i2c1_sleep";
+		blsp2_spi5 = "/soc/spi@075ba000";
+		blsp2_spi5_default = "/soc/pinctrl@1010000/blsp2_spi5_default";
+		blsp2_spi5_sleep = "/soc/pinctrl@1010000/blsp2_spi5_sleep";
+		blsp2_uart1 = "/soc/serial@75b0000";
+		blsp2_uart1_2pins_default = "/soc/pinctrl@1010000/blsp2_uart1_2pins";
+		blsp2_uart1_2pins_sleep = "/soc/pinctrl@1010000/blsp2_uart1_2pins_sleep";
+		blsp2_uart1_4pins_default = "/soc/pinctrl@1010000/blsp2_uart1_4pins";
+		blsp2_uart1_4pins_sleep = "/soc/pinctrl@1010000/blsp2_uart1_4pins_sleep";
+		blsp2_uart2 = "/soc/serial@75b1000";
+		blsp2_uart2_2pins_default = "/soc/pinctrl@1010000/blsp2_uart2_2pins";
+		blsp2_uart2_2pins_sleep = "/soc/pinctrl@1010000/blsp2_uart2_2pins_sleep";
+		blsp2_uart2_4pins_default = "/soc/pinctrl@1010000/blsp2_uart2_4pins";
+		blsp2_uart2_4pins_sleep = "/soc/pinctrl@1010000/blsp2_uart2_4pins_sleep";
+		cpu_alert0 = "/thermal-zones/cpu-thermal0/trips/trip0";
+		cpu_alert1 = "/thermal-zones/cpu-thermal1/trips/trip0";
+		cpu_alert2 = "/thermal-zones/cpu-thermal2/trips/trip0";
+		cpu_alert3 = "/thermal-zones/cpu-thermal3/trips/trip0";
+		cpu_crit0 = "/thermal-zones/cpu-thermal0/trips/trip1";
+		cpu_crit1 = "/thermal-zones/cpu-thermal1/trips/trip1";
+		cpu_crit2 = "/thermal-zones/cpu-thermal2/trips/trip1";
+		cpu_crit3 = "/thermal-zones/cpu-thermal3/trips/trip1";
+		gcc = "/soc/clock-controller@300000";
+		intc = "/soc/interrupt-controller@9bc0000";
+		mmcc = "/soc/clock-controller@8c0000";
+		msmgpio = "/soc/pinctrl@1010000";
+		sdc2_cd_off = "/soc/pinctrl@1010000/sdc2_cd_off";
+		sdc2_cd_on = "/soc/pinctrl@1010000/sdc2_cd_on";
+		sdc2_clk_off = "/soc/pinctrl@1010000/sdc2_clk_off";
+		sdc2_clk_on = "/soc/pinctrl@1010000/sdc2_clk_on";
+		sdc2_cmd_off = "/soc/pinctrl@1010000/sdc2_cmd_off";
+		sdc2_cmd_on = "/soc/pinctrl@1010000/sdc2_cmd_on";
+		sdc2_data_off = "/soc/pinctrl@1010000/sdc2_data_off";
+		sdc2_data_on = "/soc/pinctrl@1010000/sdc2_data_on";
+		sdhc2 = "/soc/sdhci@74a4900";
+		soc = "/soc";
+		spmi_bus = "/soc/qcom,spmi@400f000";
+		tsens0 = "/soc/thermal-sensor@4a8000";
+	};
+
+	aliases {
+		i2c0 = "/soc/i2c@07577000";
+		i2c1 = "/soc/i2c@075b6000";
+		i2c2 = "/soc/i2c@075b5000";
+		serial0 = "/soc/serial@75b0000";
+		serial1 = "/soc/serial@75b1000";
+		spi0 = "/soc/spi@07575000";
+		spi1 = "/soc/spi@075ba000";
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+
+		sleep_clk {
+			#clock-cells = <0x0>;
+			clock-frequency = <0x7ffc>;
+			clock-output-names = "sleep_clk";
+			compatible = "fixed-clock";
+		};
+
+		xo_board {
+			#clock-cells = <0x0>;
+			clock-frequency = <0x124f800>;
+			clock-output-names = "xo_board";
+			compatible = "fixed-clock";
+		};
+	};
+
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu-map {
+
+			cluster0 {
+
+				core0 {
+					cpu = <0x4>;
+				};
+
+				core1 {
+					cpu = <0x5>;
+				};
+			};
+
+			cluster1 {
+
+				core0 {
+					cpu = <0x6>;
+				};
+
+				core1 {
+					cpu = <0x7>;
+				};
+			};
+		};
+
+		cpu@0 {
+			compatible = "qcom,kryo";
+			device_type = "cpu";
+			enable-method = "psci";
+			next-level-cache = <0x2>;
+			phandle = <0x4>;
+			reg = <0x0 0x0>;
+
+			l2-cache {
+				cache-level = <0x2>;
+				compatible = "cache";
+				phandle = <0x2>;
+			};
+		};
+
+		cpu@1 {
+			compatible = "qcom,kryo";
+			device_type = "cpu";
+			enable-method = "psci";
+			next-level-cache = <0x2>;
+			phandle = <0x5>;
+			reg = <0x0 0x1>;
+		};
+
+		cpu@100 {
+			compatible = "qcom,kryo";
+			device_type = "cpu";
+			enable-method = "psci";
+			next-level-cache = <0x3>;
+			phandle = <0x6>;
+			reg = <0x0 0x100>;
+
+			l2-cache {
+				cache-level = <0x2>;
+				compatible = "cache";
+				phandle = <0x3>;
+			};
+		};
+
+		cpu@101 {
+			compatible = "qcom,kryo";
+			device_type = "cpu";
+			enable-method = "psci";
+			next-level-cache = <0x3>;
+			phandle = <0x7>;
+			reg = <0x0 0x101>;
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x0>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	soc {
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		compatible = "simple-bus";
+		phandle = <0x2a>;
+		ranges = <0x0 0x0 0x0 0xffffffff>;
+
+		clock-controller@300000 {
+			#clock-cells = <0x1>;
+			#power-domain-cells = <0x1>;
+			#reset-cells = <0x1>;
+			compatible = "qcom,gcc-msm8996";
+			phandle = <0x9>;
+			reg = <0x300000 0x90000>;
+		};
+
+		clock-controller@8c0000 {
+			#clock-cells = <0x1>;
+			#power-domain-cells = <0x1>;
+			#reset-cells = <0x1>;
+			assigned-clock-rates = <0x25317c00 0x30479e80 0x3a699d00 0x39387000 0x312c8040>;
+			assigned-clocks = <0x21 0xf 0x21 0x3 0x21 0x7 0x21 0x9 0x21 0xb>;
+			compatible = "qcom,mmcc-msm8996";
+			phandle = <0x21>;
+			reg = <0x8c0000 0x40000>;
+		};
+
+		i2c@07577000 {
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+			clock-names = "iface", "core";
+			clocks = <0x9 0x6d 0x9 0x76>;
+			compatible = "qcom,i2c-qup-v2.2.1";
+			interrupts = <0x0 0x61 0x0>;
+			label = "LS-I2C0";
+			phandle = <0x30>;
+			pinctrl-0 = <0x14>;
+			pinctrl-1 = <0x15>;
+			pinctrl-names = "default", "sleep";
+			reg = <0x7577000 0x1000>;
+			status = "okay";
+		};
+
+		i2c@075b5000 {
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+			clock-names = "iface", "core";
+			clocks = <0x9 0x81 0x9 0x84>;
+			compatible = "qcom,i2c-qup-v2.2.1";
+			interrupts = <0x0 0x65 0x0>;
+			label = "HS-I2C2";
+			phandle = <0x2c>;
+			pinctrl-0 = <0xc>;
+			pinctrl-1 = <0xd>;
+			pinctrl-names = "default", "sleep";
+			reg = <0x75b5000 0x1000>;
+			status = "okay";
+		};
+
+		i2c@075b6000 {
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+			clock-names = "iface", "core";
+			clocks = <0x9 0x81 0x9 0x87>;
+			compatible = "qcom,i2c-qup-v2.2.1";
+			interrupts = <0x0 0x66 0x0>;
+			label = "LS-I2C1";
+			phandle = <0x2e>;
+			pinctrl-0 = <0x10>;
+			pinctrl-1 = <0x11>;
+			pinctrl-names = "default", "sleep";
+			reg = <0x75b6000 0x1000>;
+			status = "okay";
+		};
+
+		interrupt-controller@9bc0000 {
+			#interrupt-cells = <0x3>;
+			#redistributor-regions = <0x1>;
+			compatible = "qcom,msm8996-gic-v3", "arm,gic-v3";
+			interrupt-controller;
+			interrupts = <0x1 0x9 0x4>;
+			phandle = <0x1>;
+			redistributor-stride = <0x0 0x40000>;
+			reg = <0x9bc0000 0x10000 0x9c00000 0x100000>;
+		};
+
+		pinctrl@1010000 {
+			#gpio-cells = <0x2>;
+			#interrupt-cells = <0x2>;
+			compatible = "qcom,msm8996-pinctrl";
+			gpio-controller;
+			interrupt-controller;
+			interrupts = <0x0 0xd0 0x4>;
+			phandle = <0x20>;
+			reg = <0x1010000 0x300000>;
+
+			blsp1_i2c2_default {
+				phandle = <0x14>;
+
+				pinconf {
+					bias-disable = <0x0>;
+					drive-strength = <0x10>;
+					pins = "gpio47", "gpio48";
+				};
+
+				pinmux {
+					function = "blsp_i2c3";
+					pins = "gpio47", "gpio48";
+				};
+			};
+
+			blsp1_i2c2_sleep {
+				phandle = <0x15>;
+
+				pinconf {
+					bias-disable = <0x0>;
+					drive-strength = <0x2>;
+					pins = "gpio47", "gpio48";
+				};
+
+				pinmux {
+					function = "gpio";
+					pins = "gpio47", "gpio48";
+				};
+			};
+
+			blsp1_spi0_default {
+				phandle = <0xa>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0xc>;
+					pins = "gpio0", "gpio1", "gpio3";
+				};
+
+				pinconf_cs {
+					bias-disable;
+					drive-strength = <0x10>;
+					output-high;
+					pins = "gpio2";
+				};
+
+				pinmux {
+					function = "blsp_spi1";
+					pins = "gpio0", "gpio1", "gpio3";
+				};
+
+				pinmux_cs {
+					function = "gpio";
+					pins = "gpio2";
+				};
+			};
+
+			blsp1_spi0_sleep {
+				phandle = <0xb>;
+
+				pinconf {
+					bias-pull-down;
+					drive-strength = <0x2>;
+					pins = "gpio0", "gpio1", "gpio2", "gpio3";
+				};
+
+				pinmux {
+					function = "gpio";
+					pins = "gpio0", "gpio1", "gpio2", "gpio3";
+				};
+			};
+
+			blsp2_i2c0 {
+				phandle = <0xc>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x10>;
+					pins = "gpio55", "gpio56";
+				};
+
+				pinmux {
+					function = "blsp_i2c7";
+					pins = "gpio55", "gpio56";
+				};
+			};
+
+			blsp2_i2c0_sleep {
+				phandle = <0xd>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x2>;
+					pins = "gpio55", "gpio56";
+				};
+
+				pinmux {
+					function = "gpio";
+					pins = "gpio55", "gpio56";
+				};
+			};
+
+			blsp2_i2c1 {
+				phandle = <0x10>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x10>;
+					pins = "gpio6", "gpio7";
+				};
+
+				pinmux {
+					function = "blsp_i2c8";
+					pins = "gpio6", "gpio7";
+				};
+			};
+
+			blsp2_i2c1_sleep {
+				phandle = <0x11>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x2>;
+					pins = "gpio6", "gpio7";
+				};
+
+				pinmux {
+					function = "gpio";
+					pins = "gpio6", "gpio7";
+				};
+			};
+
+			blsp2_spi5_default {
+				phandle = <0x16>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0xc>;
+					pins = "gpio85", "gpio86", "gpio88";
+				};
+
+				pinconf_cs {
+					bias-disable;
+					drive-strength = <0x10>;
+					output-high;
+					pins = "gpio87";
+				};
+
+				pinmux {
+					function = "blsp_spi12";
+					pins = "gpio85", "gpio86", "gpio88";
+				};
+
+				pinmux_cs {
+					function = "gpio";
+					pins = "gpio87";
+				};
+			};
+
+			blsp2_spi5_sleep {
+				phandle = <0x17>;
+
+				pinconf {
+					bias-pull-down;
+					drive-strength = <0x2>;
+					pins = "gpio85", "gpio86", "gpio87", "gpio88";
+				};
+
+				pinmux {
+					function = "gpio";
+					pins = "gpio85", "gpio86", "gpio87", "gpio88";
+				};
+			};
+
+			blsp2_uart1_2pins {
+				phandle = <0xe>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x10>;
+					pins = "gpio4", "gpio5";
+				};
+
+				pinmux {
+					function = "blsp_uart8";
+					pins = "gpio4", "gpio5";
+				};
+			};
+
+			blsp2_uart1_2pins_sleep {
+				phandle = <0xf>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x2>;
+					pins = "gpio4", "gpio5";
+				};
+
+				pinmux {
+					function = "gpio";
+					pins = "gpio4", "gpio5";
+				};
+			};
+
+			blsp2_uart1_4pins {
+				phandle = <0x33>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x10>;
+					pins = "gpio4", "gpio5", "gpio6", "gpio7";
+				};
+
+				pinmux {
+					function = "blsp_uart8";
+					pins = "gpio4", "gpio5", "gpio6", "gpio7";
+				};
+			};
+
+			blsp2_uart1_4pins_sleep {
+				phandle = <0x34>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x2>;
+					pins = "gpio4", "gpiio5", "gpio6", "gpio7";
+				};
+
+				pinmux {
+					function = "gpio";
+					pins = "gpio4", "gpio5", "gpio6", "gpio7";
+				};
+			};
+
+			blsp2_uart2_2pins {
+				phandle = <0x35>;
+
+				pinconf {
+					bias-disable;
+					drive-strength = <0x10>;
+					pins = "gpio49", "gpio50";
+				};
+
+				pinmux {
+					function = "blsp_uart9";
+					pins = "gpio49", "gpio50";
+				};
+			};
+
+			blsp2_uart2_2pins_sleep {